Cisco·23 days ago
23 days ago
ASIC Design Verification Engineer
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About this role
We are seeking an ASIC Design Verification Engineer to set vision and strategy for ASIC verification methodology, lead technical excellence, and mentor verification teams. The role requires expertise in System Verilog, UVM, and verification strategies, with a strong background in ASIC design and programming. Ideal for experienced professionals in hardware verification.
Skills
- asic verification
- system verilog
- uvm
- verification methodologies
- verification strategy architecture
- python scripting
- perl scripting
- root cause analysis
- technical leadership
- mentoring
- cross-functional collaboration
- data center technologies
- hyperscaler technologies
- ai networking technologies
- formal verification tools
- advanced emulation
- prototyping
- soc architecture
- silicon bring-up
- post-silicon debug
- industry standards authorship
- protocol expertise
Company
Cisco
San Jose, United States of America
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