Chelmsford RFIC Design Engineer Intern MA 1824

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

Qorvo’s Internship Program is designed for college students currently enrolled in an accredited Bachelor’s, Master’s, or PhD program. Qorvo offers real work experience, exposure to upper management, and the opportunity to pursue full-time opportunities, as available. 

 

 

Qorvo’s Internship Program offers:

• Challenging, skill-building assignments
• Mentoring and coaching from industry experts
• Launch & Learns and other learning opportunities
• Collaborative team-based work environment
• Networking and social events
• Final presentation to business leaders

 

 

 

Qorvo’s RFIC Design Engineering Internships are offered in our High Performance Analog, Advanced Cellular, and Connectivity and Sensors business groups. Specific projects and responsibilities will be determined based on the business needs at the time of the internship assignment.

 

 

 

Responsibilities may include:

• Specify, design, analyze and simulate RF and analog/mixed-signal electronic integrated circuits.
• Implement RF blocks such as Power Amplifiers, LNAs, RF Switches, Phase Shifters, and Attenuators in silicon technologies.
• Calculate and simulate the effects of various parasitics using tools for Electro-Magnetic simulation and other semiconductor extraction tools.
• Meet performance requirements while also considering size, cost, footprint, and schedule.
• Support hardware assembly, test and debugging in a laboratory setting.
• Summarize and document work in written and verbal reviews, support peer design reviews.

 

Qualifications:

• Current enrollment in MS or PhD Electrical Engineering required with minimum GPA 3.0.
• RF/Analog circuit design coursework and/or experience
• Knowledge of RF simulation tools such as Cadence Spectre/SpectreRF, ADS, FEM, Momentum and Cadence Dynamic Link
• Proficient in circuit layout using Cadence Virtuoso or ability to guide layout designer to generate layouts using proper analog layout techniques.
• Some experience using programming language tools such as Python, MATLAB or other software language tools is preferred.
• Excellent verbal and written communications skills.
• Excellent critical thinking and problem-solving skills.

 

 

Competitive hourly pay commensurate with experience: $31/hr - $42/hr (subject to change dependent on physical location) 

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability. 

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request. 

 

 

 

 

 

  MAKE A DIFFERENCE AT QORVO   

 We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.