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12 months ago
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Astera Labs·Manufacturing·12 months ago
12 months ago

Principal Emulation Engineer

San Jose, United States of AmericaSenior · 8+ yearsSoftware Engineer

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Apply faster with autofill FREEAstera Labs uses Greenhouse - autofill it instead of retyping.careers.example.com/applyAutofillingFull namePriya SharmaEmailpriya.sharma@example.comPhone+49 30 1234567LocationBerlGet the extension

About this role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

We are looking for a Principal Emulation Engineer with hands-on experience verifying protocols on complex ASICs and experience with or interest in emulation.  The ideal candidate would be at ease creating environments to enable verification teams to stress test ASICs, as well as debugging design, environment, transactor, and code issues.  The candidate must have good knowledge of communication protocols such as PCI-Express (Gen-3 and above), DDR, Ethernet, NVMe, or similar interfaces.

Basic qualifications:

  • Strong academic and technical background in computer/electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a Master’s is preferred.
  • ≥8 years’ experience supporting or developing complex SoC/silicon products for Server, Storage or Networking applications.
  • Experience working with logic designers to architect, specify, and verify hardware-software interfaces on complex SoCs.
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks and to work with minimal guidance and supervision.
  • Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!
  • Authorized to work in the US and start immediately.

Required experience:

  • Working knowledge of PCIe, Ethernet, DDR, SPI, I2C/I3C or similar protocols.
  • High level of proficiency in System Verilog and verification environments.
  • Experience understanding software and hardware co-simulation limitations and debug methods.
  • Experience in programming and scripting languages (like perl/python/C).
  • Currently based locally or open to relocation.

Preferred experience:

  • Experience in emulation and prototyping technologies like Palladium/Zebu/Veloce or HAPS and FPGA prototyping.
  • Experience in modeling for emulation and prototyping, and/or non-UVM environments

The base salary range is $209,000.00 USD – $230,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.  

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Manufacturing

Company

Astera LabsManufacturing
San Jose, United States of America

Company facts come from this company's own listings. We only show what the postings themselves carry.

Sourced from Astera Labs's careers site·first seen 11 Jun 2026·last verified 8 Sept 2026·How we source jobs

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