Hewlett Packard Enterprise·25 days ago
25 days ago
Senior ASIC Design Engineer
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What you'll do
- Define and architect high-performance blocks for advanced networking ASICs
- Collaborate with verification and physical design teams
- Focus on micro-architecture and logic design
What they're looking for
- Strong Verilog RTL coding skills
- Experience in ASIC design for networking protocols
Summarised by NextRaise from the employer’s description, which follows in full below.
Full description from employer
We are currently hiring a Senior ASIC Design Engineer to define and architect high-performance blocks for advanced networking ASICs. You will collaborate with verification and physical design teams, focusing on micro-architecture and logic design. Ideal candidates possess strong Verilog RTL coding skills and experience in ASIC design for networking protocols.
Skills
- verilog rtl coding
- asic design
- networking protocols
- synopsys design compiler
- verplex lec
- spyglass
- ethernet
- high performance memory subsystems
- multi-domain clock synchronization
- high-speed serial interfaces
- problem solving
- asic debugging
- fcoe
- testplan development
- prototype fabrication
- design verification
- design analysis
- written communication
- verbal communication
- project leadership
Company
Hewlett Packard Enterprise
Bengaluru, India
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