Senior Chip Design Engineer
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What you'll do
- Work in a combined design and verification team which develops core units within the Networking silicon.
- Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.
- Drive your design through the full implementation flow — synthesis, timing closure, lint/CDC and physical design constraints — together with the backend teams.
- Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.
What they're looking for
- B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
- 5+ years of proven experience in RTL design.
- Strong knowledge of HDL (Verilog/SystemVerilog/VHDL).
- Solid understanding of digital design fundamentals — pipelining, clock domain crossing, arbitration and low-power techniques.
- A great teammate with good communication and interpersonal skills.
Nice to have
- Familiarity with synthesis and static timing analysis is an advantage.
Summarised by NextRaise from the employer’s description, which follows in full below.
Full description from employer
NVIDIA is looking for a Senior Chip Design Engineer to join our Network Adapter Silicon group. As a Senior Design Engineer at NVIDIA Networking Silicon team, you will join a group of passionate engineers to design and implement the next generation state-of-the-art Networking Silicon chips. In this position, you will make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
What you'll be doing:
Work in a combined design and verification team which develops core units within the Networking silicon.
Own micro-architecture definition and RTL implementation of chip blocks/entities according to specifications, performance, timing, area and power requirements.
Drive your design through the full implementation flow — synthesis, timing closure, lint/CDC and physical design constraints — together with the backend teams.
Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, Verification, FW and Post-Silicon validation.
What we need to see:
B.Sc. in Electrical Engineering or Computer Engineering, or equivalent experience.
5+ years of proven experience in RTL design.
Strong knowledge of HDL (Verilog/SystemVerilog/VHDL).
Solid understanding of digital design fundamentals — pipelining, clock domain crossing, arbitration and low-power techniques.
Familiarity with synthesis and static timing analysis is an advantage.
A great teammate with good communication and interpersonal skills.
NVIDIA has some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance and lowest power silicon possible? If so, we want to hear from you. Come, join our Network Adapter Silicon design team and help us build the next chip in this exciting and quickly growing field.
Company
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