Senior Digital Verification Engineer
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What you'll do
- Architect and execute comprehensive verification strategies, test plans, and implement UVM-based environments from scratch.
- Drive functional and code coverage to closure, utilizing constrained-random testing, assertion-based verification (SVA), and formal methods to prove design correctness.
- Review design specifications early in the cycle to improve their quality, clarity, and "fitness for verification."
- Partner with global architecture, design, and software teams to optimize hardware/software partitioning and system-level verification.
- Mentor and tutor junior engineers, champion design/verification reviews, and optimize automation flows for reusability and performance.
- Participate in evaluating third-party VIP and tools, steering make/buy choices to ensure maximum engineering efficiency.
What they're looking for
- Extensive proven experience in ASIC/IC digital verification with strong mastery of SystemVerilog and UVM.
- Demonstrated ability to independently set up a UVM testbench from scratch, translating a specification into a final full verification Environment.
- Proficiency with industry-standard simulators and management tools (e.g., Cadence Xcelium, eManager/vManager) along with Verilog, VHDL, and SystemVerilog.
- Solid grounding in Functional Verification, ABV, Formal Verification, and regression frameworks.
- Intermediate to advanced digital design skills, allowing for deep technical alignment with design and architecture teams.
- Excellent interpersonal skills and strong proficiency in English (written and verbal), with the assertiveness to effectively guide technical decisions.
Summarised by NextRaise from the employer’s description, which follows in full below.
Full description from employer
Job Description
We are seeking an experienced Senior Digital Verification Engineer to lead end‑to‑end verification of complex IC blocks and systems.
Key Responsibilities
- Define Strategy & Ownership: Architect and execute comprehensive verification strategies, test plans, and implement UVM-based environments from scratch.
- Verification Closure: Drive functional and code coverage to closure, utilizing constrained-random testing, assertion-based verification (SVA), and formal methods to prove design correctness.
- Specification Quality: Review design specifications early in the cycle to improve their quality, clarity, and "fitness for verification."
- Cross-Functional Collaboration: Partner with global architecture, design, and software teams to optimize hardware/software partitioning and system-level verification.
- Technical Leadership: Mentor and tutor junior engineers, champion design/verification reviews, and optimize automation flows for reusability and performance.
- Make/Buy Decisions: Participate in evaluating third-party VIP and tools, steering make/buy choices to ensure maximum engineering efficiency.
Qualifications
- Experience: Extensive proven experience in ASIC/IC digital verification with strong mastery of SystemVerilog and UVM.
- Strong Technical capabilities : Demonstrated ability to independently set up a UVM testbench from scratch, translating a specification into a final full verification Environment.
- Tools & Languages: Proficiency with industry-standard simulators and management tools (e.g., Cadence Xcelium, eManager/vManager) along with Verilog, VHDL, and SystemVerilog.
- Methodologies: Solid grounding in Functional Verification, ABV, Formal Verification, and regression frameworks.
- Design Skills: Intermediate to advanced digital design skills, allowing for deep technical alignment with design and architecture teams.
- Communication: Excellent interpersonal skills and strong proficiency in English (written and verbal), with the assertiveness to effectively guide technical decisions.
Additional Information
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Company
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