Cisco·2 months ago
2 months ago
Signal & Power Integrity Hardware ASIC Simulation Engineer Lead (Remote)
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About this role
Exciting opportunity for a Signal & Power Integrity Hardware ASIC Simulation Engineer Lead to drive the design and verification of advanced ASIC packaging for Cisco platforms. Lead technical teams, develop high-performance solutions, and collaborate on complex hardware projects. Ideal for experienced engineers with expertise in high-speed design and SI/PI simulation.
Skills
- signal integrity simulation
- power integrity simulation
- high-speed design
- transmission line theory
- electromagnetics
- impedance network analysis
- cadence sigrity
- ansys hfss
- high-frequency design
- 56g pam4 serdes
- channel modeling
- ber prediction
- layout review
- physical design validation
- cadence apd
- ansys em flows
- spice
- signal modeling
- performance validation
- high-volume release design
- post-layout extraction
- mentoring
- technical communication
- cowos packaging
- emib packaging
- interposer-based design
- die-to-die interface
- high-bandwidth memory interface
- vector network analysis
- ibis
Company
Cisco
San Jose, United States of America
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