NextRaiseNextRaiseFind jobs
Sign inSign up free
Jobs / Hardware Test Engineer in United States of America
10 days ago
Apply with autofill
Apply with autofill
NVIDIA·Semiconductors·10 days ago
10 days ago

Silicon Validation Engineer

Santa Clara, United States of AmericaMid · 2-5 yearsHardware Test Engineer

Sign up free to see how well your resume matches this role.

Boost your chances at NVIDIA

How you compare FREE

?
Your scoreYour score: not yet known
→
32
Top 10%Top 10%: 32 out of 100

Top 10% of NextRaise users matched against Hardware Test Engineer roles in United States.

Must-have skills for this role

  • silicon bring-up
  • asic validation
  • system-level debug
  • pvt

PDF or DOCX · no account needed

Apply faster with autofill FREEThe NextRaise extension autofills your application in one click.careers.example.com/applyAutofillingFull namePriya SharmaEmailpriya.sharma@example.comPhone+49 30 1234567LocationBerlGet the extension

What you'll do

  • Design system-level validation strategies for complex architectures, corner cases, PVT, large-scale behavior, feature interactions
  • Build AI-assisted and data-driven validation workflows that improve coverage, debug turnaround, and efficiency
  • Profile real workloads: training, inference, HPC, video, and emerging applications
  • Deploy automation and telemetry pipelines that scale across products and teams
  • Drive silicon bring-up and root-cause debug with reusable, high-leverage methods

What they're looking for

  • BS/MS in EE/CE (or equivalent experience)
  • 2+ years in silicon bring-up, ASIC validation, or system-level debug
  • Grounding in PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip)
  • Understanding of firmware/driver-hardware interaction
  • Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development
  • Thrive in a collaborative environment.

Nice to have

  • You've applied AI/ML or LLMs to validation, debug automation, or workload analysis, not just mentioned it
  • You've built infrastructure others still use: pipelines, observability systems, debug tools
  • You have artifacts: postmortems, test methods, tools, papers, or dashboards that show how you think
  • You've driven cross-functional work across architecture, firmware, validation, and manufacturing

Summarised by NextRaise from the employer’s description, which follows in full below.

Full description from employer

NVIDIA Silicon Co-design Group is seeking a versatile engineer to join the HW ArchDev Methodology team. SCG operates across the full product lifecycle—from early architecture definition through silicon bring-up to production—providing a unique end-to-end perspective on next-generation systems

You define how validation is done. Not how it's been done, how it should be done, for chips that don't exist yet. NVIDIA's HW ArchDev Methodology team sits at a rare intersection: architecture, silicon bring-up, and production, all in one group. We build the validation strategies, automation frameworks, and telemetry systems that determine whether next-generation GPUs and AI accelerators ship on time and at quality. The problems are novel. The stakes are real.

What you’ll be doing:

  • Design system-level validation strategies for complex architectures, corner cases, PVT, large-scale behavior, feature interactions

  • Build AI-assisted and data-driven validation workflows that improve coverage, debug turnaround, and efficiency

  • Profile real workloads: training, inference, HPC, video, and emerging applications

  • Deploy automation and telemetry pipelines that scale across products and teams

  • Drive silicon bring-up and root-cause debug with reusable, high-leverage methods

What we need to see:

  • BS/MS in EE/CE (or equivalent experience)

  • 2+ years in silicon bring-up, ASIC validation, or system-level debug

  • Grounding in PVT, timing (STA), signal integrity, power, and high-speed IO (PCIe, chip-to-chip)

  • Understanding of firmware/driver-hardware interaction

  • Experience or curiosity around data-driven workflows, telemetry, and AI/LLM-assisted development

  • Thrive in a collaborative environment.

Ways to Stand Out from the crowd:

  • You've applied AI/ML or LLMs to validation, debug automation, or workload analysis, not just mentioned it

  • You've built infrastructure others still use: pipelines, observability systems, debug tools

  • You have artifacts: postmortems, test methods, tools, papers, or dashboards that show how you think

  • You've driven cross-functional work across architecture, firmware, validation, and manufacturing

If you've ever looked at a validation process and redesigned it from first principles, we want to talk!

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until September 14, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Semiconductors

Company

NVIDIASemiconductors
Santa Clara, United States of America

Company facts come from this company's own listings. We only show what the postings themselves carry.

Sourced from NVIDIA's careers site·first seen 10 Sept 2026·last verified 10 Sept 2026·How we source jobs

Similar jobs

  • Staffl Hardware Test Engineer at ngcCincinnati, United States of America–match not yet calculated
  • Product Validation Engineer at allegromicroManchester, United States of America–match not yet calculated
  • Sr. Memory Validation Engineer at ambarellaUS Headquarters, United States of America–match not yet calculated
  • Principal Product Validation Engineer at jabilAustin, United States of America–match not yet calculated
  • Intern - Validation Engineering at Magna InternationalAuburn Hills, United States of America–match not yet calculated

Browse more jobs

  • Hardware Test Engineer jobs in United States
  • Reliability Engineer (Hardware) jobs in United States
  • Test Development Engineer jobs in United States
  • Electrical Test Engineer jobs in United States
  • Hardware Test Engineer jobs in India
  • Hardware Test Engineer jobs in France