NextRaiseNextRaiseFind jobs
Sign inSign up free
Jobs / Digital IC Design Engineer in United States of America
1 month ago
Apply with autofill
Apply with autofill
Amazon·E-commerce·1 month ago
1 month ago

ASIC III - AMZ10291241

Sunnyvale, United States of AmericaFull-timeOn-siteMid · 5+ yearsDigital IC Design Engineer

Sign up free to see how well your resume matches this role.

Boost your chances at Amazon

How you compare FREE

?
Your scoreYour score: not yet known
→
66
Top 10%Top 10%: 66 out of 100

Top 10% of NextRaise users matched against Digital IC Design Engineer roles in United States.

Must-have skills for this role

  • static timing analysis
  • sta
  • rtl
  • physical design

PDF or DOCX · no account needed

Apply faster with autofill FREEThe NextRaise extension autofills your application in one click.careers.example.com/applyAutofillingFull namePriya SharmaEmailpriya.sharma@example.comPhone+49 30 1234567LocationBerlGet the extension

What you'll do

  • Work on the Physical Design aspects of the system-on-chip (SoC) delivery.
  • Work with RTL/logic designers to drive architectural feasibility studies.
  • Explore power performance-area tradeoffs for physical design closure at the block and Sub System level.
  • Contribute to developing physical design methodologies & design flows.
  • Drive physical design flow automation scripts using Tcl, Perl and/or Python.
  • Carry the assigned block/partition physical implementation through synthesis, formal verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off.
  • Work closely with third party design and fabrication services to deliver quality first pass silicon that meets all performance, power and area goals.
  • Create push button flows for RTL2GDS.
  • Establish a regression flow that is triggered by new RTL check-in.
  • Create automation for distributing various runs to LSF grid and for viewing server CPU/Memory usage for Vendor license management and Usage.
  • Define and develop signoff methodology and corresponding implementation solution for Static Timing Analysis (STA).
  • Participate in full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC.

What they're looking for

  • Master’s degree or foreign equivalent degree in Computer Science, Engineering, or a related field and five years of experience in the job offered or a related occupation. Employer will accept a Bachelor’s degree or foreign equivalent degree in Computer Science, Engineering, or a related field and seven years of progressive post-baccalaureate experience in the job offered or a related occupation as equivalent to the Master's degree and five years of experience.
  • Must have five years of experience with the following skill(s): (1) experience with Static Timing Analysis (STA) including definition and development of signoff methodology and corresponding implementation solutions; (2) creating physical design flow automation scripts using Tcl, Perl, or Python; (3) developing physical design methodologies and design flows; and (4) physical design of industry leading system-on-chip (SoC).

Nice to have

  • Please see job description and the position requirements above.

Summarised by NextRaise from the employer’s description, which follows in full below.

Full description from employer

MULTIPLE POSITIONS AVAILABLE

Employer: AMAZON.COM SERVICES LLC
Offered Position: ASIC III
Job Location: Sunnyvale, California
Job Number: AMZ10291241

Position Responsibilities:

Work on the Physical Design aspects of the system-on-chip (SoC) delivery. Work with RTL/logic designers to drive architectural feasibility studies. Explore power performance-area tradeoffs for physical design closure at the block and Sub System level. Contribute to developing physical design methodologies & design flows. Drive physical design flow automation scripts using Tcl, Perl and/or Python. Carry the assigned block/partition physical implementation through synthesis, formal verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off. Work closely with third party design and fabrication services to deliver quality first pass silicon that meets all performance, power and area goals. Create push button flows for RTL2GDS. Establish a regression flow that is triggered by new RTL check-in. Create automation for distributing various runs to LSF grid and for viewing server CPU/Memory usage for Vendor license management and Usage. Define and develop signoff methodology and corresponding implementation solution for Static Timing Analysis (STA). Participate in full chip timing constraints development, full chip / Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC. Streamline the timing signoff criterions, timing analysis methodologies and flows.

40 hours / week, 8:00am-5:00pm, Salary Range: $236,558/year to $247,600/year.

Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, visit:
https://www.aboutamazon.com/workplace/employee-benefits.

Amazon.com is an Equal Opportunity-Affirmative Action Employer – Minority / Female / Disability / Veteran / Gender Identity / Sexual Orientation.#0000

Basic Qualifications

Position Requirements:

Master’s degree or foreign equivalent degree in Computer Science, Engineering, or a related field and five years of experience in the job offered or a related occupation. Employer will accept a Bachelor’s degree or foreign equivalent degree in Computer Science, Engineering, or a related field and seven years of progressive post-baccalaureate experience in the job offered or a related occupation as equivalent to the Master's degree and five years of experience. Must have five years of experience with the following skill(s): (1) experience with Static Timing Analysis (STA) including definition and development of signoff methodology and corresponding implementation solutions; (2) creating physical design flow automation scripts using Tcl, Perl, or Python; (3) developing physical design methodologies and design flows; and (4) physical design of industry leading system-on-chip (SoC).#0000

Preferred Qualifications

Please see job description and the position requirements above.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.
E-commerce

Company

AmazonE-commerce
Sunnyvale, United States of America

Company facts come from this company's own listings. We only show what the postings themselves carry.

Sourced from Amazon's careers site·first seen 5 Aug 2026·last verified 8 Sept 2026·How we source jobs

Similar jobs

  • Principal Digital Design Engineer at NXP SemiconductorsChandler, United States of America–match not yet calculated
  • Intern - ASIC Digital Design at Micron TechnologyMinneapolis, United States of America–match not yet calculated
  • Distinguished Technologist, VLSI Engineering at HPE (Hewlett Packard Enterprise)Sunnyvale, United States of America–match not yet calculated
  • Sr Principal VLSI Engineer at HPE (Hewlett Packard Enterprise)Sunnyvale, United States of America–match not yet calculated
  • New College Grad - Engineer, ASIC Digital Design at Micron TechnologyMinneapolis, United States of America–match not yet calculated

Browse more jobs

  • Digital IC Design Engineer jobs in United States
  • IC Verification Engineer jobs in United States
  • Analog IC Design Engineer jobs in United States
  • Process / Device Engineer jobs in United States
  • Digital IC Design Engineer jobs in India
  • Digital IC Design Engineer jobs in Canada