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Jobs / Digital IC Design Engineer in United States of America
1 month ago
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Volantissemiconductorinc·1 month ago
1 month ago

DFT Lead

SF Bay Area, United States of AmericaHybridSenior · 6-10 yearsDigital IC Design Engineer

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Must-have skills for this role

  • dft
  • soc tapeouts
  • advanced node

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Apply faster with autofill FREEvolantissemiconductorinc uses Greenhouse - autofill it instead of retyping.careers.example.com/applyAutofillingFull namePriya SharmaEmailpriya.sharma@example.comPhone+49 30 1234567LocationBerlGet the extension

About this role

What We’re Looking For:

We’re looking for DFT engineers to contribute to and own DFT efforts for blocks and entire dies on the A-0 and A-1 wafer-scale systems. 

 

Ideal Background:

  • Experience leading DFT efforts for multiple advanced node SoC tapeouts 

 

Nice to Have:

  • Experience leading DFT efforts for large die area (eg reticle-max) chips 
  • Experience leading DFT efforts for multi-die/multi-chiplet/MCM designs 
  • Experience leading DFT efforts for AI accelerator SoCs

Company

VO
Volantissemiconductorinc
SF Bay Area, United States of America

Company facts come from this company's own listings. We only show what the postings themselves carry.

Sourced from Volantissemiconductorinc's careers site·first seen 29 Aug 2026·last verified 8 Sept 2026·How we source jobs

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