Engineering Manager 2

Description

The candidate will help staff, and lead MSB’s IC Verification Team in Bengaluru with a mission of building a strong team focused on chip-level verification. This team will be a key part of our Mobile Solutions Business, which consists of highly integrated front end modules that integrate Filters, Switches, LNAs, and matching in densely packed & complex front-end modules for Cellular and WiFi applications. The team will work directly and closely with design teams in the US.

As the Verification manager, you will be responsible for a team of engineers driving chip top level verification. You and your team will engage in frequent technical meetings and design reviews with chip leads and counterparts abroad.  

In this position, you have the opportunity to make uniquely large impact on the success of the company and will have visibility at the highest levels of the company.

We are looking for a passion to win/contribute and ability to work in, and thrive in, a fast-paced dynamic team environment.

Responsibilities

The candidate will report to the Engineering Director locally and have a team of Engineers reporting to them. These Engineers will have a matrix reporting structure to various teams in US leading IC design. 

Responsibilities will include, but not be limited to:

1. Recruiting & Staffing:

1. 1. Jointly drive staffing & recruiting with HR to ensure a world-class team is brought together to execute on complex, highly critical programs.
2. Technical Leadership:
   1. Act as the IC Verification & Technical Leader for a team focused on the verification of RFICs that are integrated into our complex front-end modules
   2. Experience managing large technical teams
   3. A track record of growing successful design teams
   4. Ability to set & articulate clear goals and drive accountability to those 
   5. Use of AI tools to improve productivity, efficiency, automation, bug-tracking and reporting
3. Communication:
   1. Drive company communications, strategy, and goals via team meetings and regular 1:1 and reporting to chip leads and managers in the US.
4. Travel to US will be required from time to time

Required Experience and Skills

1. The candidate must have excellent written and spoken communications, sufficient to present program technical status & schedule progress to senior management.
2. Technical requirements:
   1. Strong experience with the Cadence suite of EDA tools
   2. Deep and broad expertise in functional AMS verification of RFICs including RF/Analog/Digital content
   3. Develop and maintain verification plans, strategies and methodology
   4. Perform functional, behavioral and regression verification
   5. Collaborate with RF designers and chip leads for successful tapeout and release of products to guarantee first-pass success
   6. Automate verification flows and reporting infrastructure
   7. Strong debug and root-cause analysis skills
3. Circuit Analysis:
   1. Understanding of analog blocks including low bit count data converters (ADC & DAC blocks), Bandgaps, Op-Amps, Bias blocks, Charge-pumps, Temp sensor, LDO, ESD, e-fuse and other supporting cells.
   2. Knowledge of RF SOI technology including RF switch, tuning & RF LNA design.
   3. Digital Design including SPI & MIPI interface design, Decoding logic, and simple state machines.
   4. Semiconductor device and process knowledge including SOI, bulk CMOS, SiGe.

Minimum Requirements

1. BSEE; MS preferred
2. 10+ years of IC Design/Verification experience
3. 6+ years of Technical Leadership and Management experience

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