Formal Verification Engineer
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What you'll do
- The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
- Developing scripts to automate the verification process.
- Review formal setups and proofs with design and verification teams.
- Maintain and extend assertion libraries, including support for both simulation and FV.
- Identifying key behaviours for verification of DUT and creating a verification plan.
- Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
- Applying various FV techniques to prove correctness of digital designs.
- Debugging RTL to identify causes of failure scenarios.
What they're looking for
- Bachelors/Masters in Electronics & Communications or Computer Science or electrical engineering from a reputed engineering college.
- Minimum 2+ years of industry experience on formal techniques for verification.
- Strong analytical skills to tackle hard problems.
- Excellent command of scripting.
- Strong knowledge of architectures of CPU designs and digital logic.
- Good understanding of abstraction techniques for effective verification.
- Hands-on experience with HDLs such as Verilog / System Verilog.
- Understanding of temporal logic assertions.
- Preferable experience with a variety of Formal Verification Tools
- Strong communication skills are required along with the ability to work in a dynamic product oriented team and collaborate effectively across sites.
Nice to have
- Worked on various pieces of CPU/GPU unit/microarchitecture verification
- Background with complex verification projects that had used formal techniques for closure.
- Experience of collaborating with geographically diverse cross-functional teams
- A history of mentoring junior engineers and interns a huge plus.
Summarised by NextRaise from the employer’s description, which follows in full below.
Full description from employer
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!
We are currently seeking an experienced Formal Verification Engineer with strong CPU/GPU and verification fundamentals to work in NVIDIA's Central Formal team based in Bangalore. NVIDIA builds CPUs and GPUs that powering up the next generation AI and HPC workloads. This position will have you crafting and optimising formal verification flows across CPU/GPU projects and resolving tool issues for design teams with tool vendors. Additionally, you'll verify the micro-architecture using formal verification tools to employ the latest model checking and equivalence checking techniques. You will be expected to understand the design & implementation, define the verification scope, and ensure design correctness. You will use advanced formal techniques to obtain full proofs, or sufficient bounded proofs, of the design while working with architects, designers, pre- and post-silicon verification teams to accomplish your tasks.
What you’ll be doing:
The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification team.
Developing scripts to automate the verification process.
Review formal setups and proofs with design and verification teams.
Maintain and extend assertion libraries, including support for both simulation and FV.
Identifying key behaviours for verification of DUT and creating a verification plan.
Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
Applying various FV techniques to prove correctness of digital designs.
Debugging RTL to identify causes of failure scenarios.
What we need to see:
Bachelors/Masters in Electronics & Communications or Computer Science or electrical engineering from a reputed engineering college.
Minimum 2+ years of industry experience on formal techniques for verification.
Strong analytical skills to tackle hard problems.
Excellent command of scripting.
Strong knowledge of architectures of CPU designs and digital logic.
Good understanding of abstraction techniques for effective verification.
Hands-on experience with HDLs such as Verilog / System Verilog.
Understanding of temporal logic assertions.
Preferable experience with a variety of Formal Verification Tools
Strong communication skills are required along with the ability to work in a dynamic product oriented team and collaborate effectively across sites.
Ways to stand out from the crowd:
Worked on various pieces of CPU/GPU unit/microarchitecture verification
Background with complex verification projects that had used formal techniques for closure.
Experience of collaborating with geographically diverse cross-functional teams
A history of mentoring junior engineers and interns a huge plus.
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.
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