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Texas Instruments·Semiconductors·2 months ago

Physical Design Engineer

Bengaluru, IndiaMid · 2-5 years

About this role

About TI

Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping about 100,000 customers transform the future, today. We’re committed to building a better future – from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job! 

 

About the Role:

Are you looking for a career at one of the leading semiconductor companies in the world Texas Instruments (TI) is looking for a Physical design engineer to join the team of enthusiastic engineers who develops highly complex mixed signal devices for audio applications with industry leading performance.

We are seeking a skilled Digital Physical Design Engineer of 2-5 Year of industry experience  with good RTL design hands-on and understanding. The candidate will be responsible for taking RTL through synthesis, floorplanning, place-and-route, timing closure, power optimization, and physical verification to tape-out. This role demands hands-on expertise in EDA tools, physical design flows, and deep knowledge of digital VLSI concepts.

 

Key Responsibilities:

  • Execute RTL-to-GDSII physical design flow for complex SoC/ASIC blocks.
  • Perform logic synthesis, floor-planning, placement, clock tree synthesis (CTS), and routing.
  • Develop/support/update design constraints.
  • Drive timing closure across multiple corners and modes using static timing analysis (STA).
  • Good understanding of digital timing analysis
  • Optimize for area, power, and performance (PPA) at block and chip level.
  • Conduct physical verification: DRC, LVS, Antenna checks, IR-drop, and EM analysis.
  • Develop/support/update constraints.
  • Collaborate with RTL design, verification, and architecture teams to resolve design and implementation issues.
  • Provide EDA flow automation support (scripting in TCL/Perl/Python).
  • Contribute to design reviews, documentation, and sign-off processes for successful tape-out.
  • Highly prefer if additionally able to handle RTL coding, Digital QC(RDC/CDC/Lint). Contribute to digital design reviews and Arch reviews.