Principal Physical Design Engineer

Take on the role of Principal Physical Design Engineer, driving advanced ASIC design methodologies and automation. Lead the development and optimisation of P&R flows, collaborating with design teams to deliver high-performance silicon. Ideal for experienced engineers with deep expertise in Cadence Innovus, Synopsys Fusion Compiler, and modern RTL-to-GDS flows.

Skills

• 7nm tapeout
• python
• eco generation
• dft integration
• power grid design
• lvs/drc/erc/ant verification
• perl
• floorplan design
• debugging
• verilog
• problem solving
• rtl to gdsii
• formal verification
• 2.5d/3d packaging
• place and route
• collaboration
• physical design
• clock network design
• tcl
• linux shell scripting